Автор: Vahid Frank
Название: Digital Design with RTL Design, Verilog and VHDL
ISBN: 0470531088 ISBN-13(EAN): 9780470531082
Издательство: Wiley
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Цена: 20569 р.
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Описание: Unique with its RTL-early organization, Vahid`s text supports instructors wishing to develop strong design skills in their students. The emergence of parallel processing, multicore processors and FPGAs are blurring the lines between hardware and software and fundamentally altering the way digital design and design logic should be taught.

Автор: Peter Wilson
Название: Design Recipes for FPGAs: Using Verilog and VHDL,
ISBN: 0750668458 ISBN-13(EAN): 9780750668453
Издательство: Elsevier Science
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Цена: 4203 р.
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Описание: Using a modular structure, this book gives several design techniques and templates, together with functional code, which engineers can easily apply to their applications. It enables the experienced FPGA designer to select the right design for their application, while providing the less experienced with a road map to solve their design problem.

Автор: Navabi
Название: Verilog digital system design
ISBN: 0071445641 ISBN-13(EAN): 9780071445641
Издательство: McGraw-Hill
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Цена: 4811 р.
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Описание: Shows electronics designers and students how to deploy Verilog in sophisticated digital systems design. This book includes worked examples for Verilog 2001, synthesis standards. It also provides coverage of the OVI verification library.

Автор: Bening Lionel, Foster Harry D.
Название: Principles of Verifiable RTL Design / A Functional Coding Style Supporting Verification Processes in Verilog
ISBN: 0792373685 ISBN-13(EAN): 9780792373681
Издательство: Springer
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Цена: 15419 р.
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Описание: The first edition of Principles of Verifiable RTL Design offered a common sense method for simplifying and unifying assertion specification by creating a set of predefined specification modules that could be instantiated within the designer's RTL. Since the release of the first edition, an entire industry-wide initiative for assertion specification has emerged based on ideas presented in the first edition. This initiative, known as the Open Verification Library Initiative (www.verificationlib.org), provides an assertion interface standard that enables the design engineer to capture many interesting properties of the design and precludes the need to introduce new HDL constructs (i.e., extensions to Verilog are not required). Furthermore, this standard enables the design engineer to `specify once,' then target the same RTL assertion specification over multiple verification processes, such as traditional simulation, semi-formal and formal verification tools. The Open Verification Library Initiative is an empowering technology that will benefit design and verification engineers while providing unity to the EDA community (e.g., providers of testbench generation tools, traditional simulators, commercial assertion checking support tools, symbolic simulation, and semi-formal and formal verification tools). The second edition of Principles of Verifiable RTL Design expands the discussion of assertion specification by including a new chapter entitled `Coverage, Events and Assertions'. All assertions exampled are aligned with the Open Verification Library Initiative proposed standard. Furthermore, the second edition provides expanded discussions on the following topics: start-up verification; the place for 4-state simulation; race conditions; RTL-style-synthesizable RTL (unambiguous mapping to gates); more `bad stuff'. The goal of the second edition is to keep the topic current. Principles of Verifiable RTL Design, A Functional Coding Style Supporting Verification Processes, Second Edition tells you how you can write Verilog to describe chip designs at the RTL level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.

Автор: Vahid
Название: Verilog for Digital Design
ISBN: 0470052627 ISBN-13(EAN): 9780470052624
Издательство: Wiley
Цена: 9814 р.
Наличие на складе: Нет в наличии.

Описание: Digital Design provides a modern approach to learning the increasingly important topic of digital systems design. The text's focus on register-transfer-level design and present-day applications not only leads to a better appreciation of computers and of today's ubiquitous digital devices, but also provides for a better understanding of careers involving digital design and embedded system design. Verilog for Digital Design can be used as a standalone introductory guide or can be used in tandem with Vahid's Digital Design to allow for greater language coverage.

Автор: Grimm Christoph
Название: Languages for System Specification / Selected Contributions on UML, SystemC, System Verilog, Mixed-Signal Systems, and Property Specifications from FDL`03
ISBN: 1402079907 ISBN-13(EAN): 9781402079900
Издательство: Springer
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Цена: 14268 р.
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Описание: Contributions on UML address the application of UML in the specification of embedded HW/SW systems. C-Based System Design embraces the modeling of operating systems, modeling with different models of computation, generation of test patterns, and experiences from case studies with SystemC. Analog and Mixed-Signal Systems covers rules for solving general modeling problems in VHDL-AMS, modeling of multi-nature systems, synthesis, and modeling of Mixed-Signal Systems with SystemC. Languages for formal methods are addressed by contributions on formal specification and refinement of hybrid, embedded and real-time stems. Together with articles on new languages such as SystemVerilog and Software Engineering in Automotive Systems the contributions selected for this book embrace all aspects of languages and models for specification, design, modeling and verification of systems. Therefore, the book gives an excellent overview of the actual state-of-the-art and the latest research results.

Автор: Thomas, Donald Moorby, Philip
Название: Verilog hardware description language
ISBN: 0387849300 ISBN-13(EAN): 9780387849300
Издательство: Springer
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Цена: 5527 р.
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Описание: Offers reference for Verilog language. This title presents the IEEE 1364-2001 standard of the language. It includes examples that illustrate the features of the language. It is suitable for engineers and students interested in describing, simulating, and synthesizing digital systems.

Автор: Sutherland Stuart
Название: The Verilog PLI Handbook / A User`s Guide and Comprehensive Reference on the Verilog Programming Language Interface
ISBN: 0792376587 ISBN-13(EAN): 9780792376583
Издательство: Springer
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Цена: 19274 р.
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Описание: The Verilog Programming Language Interface is a powerful feature of the Verilog standard. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired, such as adding custom design debug utilities, adding proprietary file read/write utilities, and interfacing bus functional C language models to a simulator. This book serves as both a user's guide for learning the Verilog PLI, and as a comprehensive reference manual on the Verilog PLI standard. Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of the PLI are presented, based on the IEEE 1364 Verilog standard. The second edition of this book adds detailed coverage of the many enhancements added in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001"). A CD is included, with the C source code, Verilog HDL test cases and simulation result logs for more than 75 complete PLI examples.

Автор: Verilog-2001 / A Guide To The New Features Of The Verilog Hardware Description Language
Название: Verilog-2001 / A Guide To The New Features Of The Verilog Hardware Description Language
ISBN: 0792375688 ISBN-13(EAN): 9780792375685
Издательство: Springer
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Цена: 11565 р.
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Описание: The IEEE 1364-2001 standard, nicknamed `Verilog-2001', is the first major update to the Verilog language since its inception in 1984. This book presents 45 significant enhancements contained in Verilog-2001 standard. A few of the new features described in this book are: ANSI C style port declarations for modules, primitives, tasks and functions; Automatic tasks and functions (re-entrant tasks and recursive functions); Multidimensional arrays of any data type, plus array bit and part selects; Signed arithmetic extensions, including signed data types and sign casting; Enhanced file I/O capabilities, such as $fscanf, $fread and much more; Enhanced deep submicron timing accuracy and glitch detection; Generate blocks for creating multiple instances of modules and procedures; Configurations for true source file management within the Verilog language. This book assumes that the reader is already familiar with using Verilog. It supplements other excellent books on how to use the Verilog language, such as The Verilog Hardware Description Language, by Donald Thomas and Philip Moorby (Kluwer Academic Publishers, ISBN: 0-7923-8166-1) and Verilog Quickstart: A Practical Guide to Simulation and Synthesis, by James Lee (Kluwer Academic Publishers, ISBN: 0-7923-8515-2).

Автор: Chonnad
Название: Verilog: Frequently Asked Questions
ISBN: 0387228349 ISBN-13(EAN): 9780387228341
Издательство: Springer
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Цена: 11565 р.
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Описание: This book addresses "front end" questions and issues encountered in using the Verilog HDL, during all the stages of Hardware Design, Synthesis and Verification. The issues discussed in the book are typically encountered in both ASIC design projects as well as in Soft IP designs. These issues are addressed in a simple Q&A format.

Since each issue is independently dealt with and explained in detail, this book acts as an important source of reference for the Verilog users. Each of the FAQs will be illustrated with figures and tables as required. The latest Verilog-2001 and SystemVerilog have also been referred to in this book.

With the increasing complexity of ASICs being designed these days, the decisions that one makes in any of the stages of Design, Synthesis or Verification has profound effects on these three stages. This book presents the intricacies of these inter-dependent issues in the context of the Verilog HDL.

Автор: David J. Lilja
Название: Designing Digital Computer Systems with Verilog
ISBN: 052104572X ISBN-13(EAN): 9780521045728
Издательство: Cambridge Academ
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Цена: 3352 р.
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Описание: This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined – this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

Автор: Vahid
Название: Verilog for Digital Design Set
ISBN: 0470100141 ISBN-13(EAN): 9780470100141
Издательство: Wiley
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Цена: 13932 р.
Наличие на складе: Нет в наличии.