Dedicated Digital Processors: Methods in Hardware/Software Co-Design, F. Mayer-Lindenberg
Автор: Christian Piguet Название: Low-Power Processors and Systems on Chips ISBN: 084936700X ISBN-13(EAN): 9780849367007 Издательство: Taylor&Francis Рейтинг: Цена: 11202 р. Наличие на складе: Поставка под заказ.
Описание: The power consumption of microprocessors is one of the most important challenges of high-performance chips and portable devices. In chapters drawn from
Piguet's recently published "Low-Power Electronics Design", this volume addresses the design of low-power microprocessors in deep submicron technologies. It provides a focused
reference for specialists involved in systems-on-chips, from low-power microprocessors to DSP cores, reconfigurable processors, memories, ad-hoc networks, and embedded
"Low-Power Processors and Systems on Chips" is organized into three broad sections for convenient access. The first section examines the design of digital signal
processors for embedded applications and techniques for reducing dynamic and static power at the electrical and system levels. The second part describes several aspects of
low-power systems on chips, including hardware and embedded software aspects, efficient data storage, networks-on-chips, and applications such as routing strategies in wireless RF
sensing and actuating devices.
The final section discusses embedded software issues, including details on compilers, retargetable compilers, and coverification tools.
Providing detailed examinations contributed by leading experts, "Low-Power Processors and Systems on Chips" supplies authoritative information on how to maintain high performance
while lowering power consumption in modern processors and SoCs. It is a must-read for anyone designing modern computers or embedded systems.
Описание: This book examines the issue of design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The material then develops into detailed circuit and architectural analysis of specific clock generation blocks. This includes circuits and architectures of PLLs with high power supply noise immunity and digital PLL architectures where the loop filter is digitized. Methods of generating low-spurious sampling clocks for discrete-time analog blocks are then examined. This includes sigma-delta fractional-N PLLs, Direct Digital Synthesis (DDS) techniques and non-conventional uses of PLLs. Design for test (DFT) issues as they arise in PLLs are then discussed. This includes methods of accurately measuring jitter and built-in-self-test (BIST) techniques for PLLs. Finally, clocking issues commonly associated to system-on-a-chip (SOC) designs, such as multiple clock domain interfacing and partitioning, and accurate clock phase generation techniques using delay-locked loops (DLLs) are also addressed. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level. This book is well suited for practitioners as well as graduate level students who wish to learn more about time-domain analysis and design of frequency synthesis techniques.
Описание: As we embrace the world of personal, portable, and perplexingly complex digital systems, it has befallen upon the bewildered designer to take advantage of the available transistors to produce a system which is small, fast, cheap and correct, yet possesses increased functionality.Increasingly, these systems have to consume little energy. Designers are increasingly turning towards small processors, which are low power, and customize these processors both in software and hardware to achieve their objectives of a low power system, which is verified, and has short design turnaround times.Designing Embedded Processors examines the many ways in which processor based systems are designed to allow low power devices. It looks at processor design methods, memory optimization, dynamic voltage scaling methods, compiler methods, and multi processor methods. Each section has an introductory chapter to give a breadth view, and have a few specialist chapters in the area to give a deeper perspective. The book provides a good starting point to engineers in the area, and to research students embarking upon the exciting area of embedded systems and architectures.
Описание: The POLIS system which is a co-design environment for embedded systems is based on a formal model of computation. POLIS was initiated in 1988 as a research project at the University of California at Berkeley. This book gives an overview of the POLIS system including its formal and algorithmic aspects.
Описание: Provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. This book introduces a generic flow for embedded on-chip processor design and explores the design space of on-chip processing.
Описание: After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of real-world signal processing applications serves as vehicle to illustrate each design decision and provides a hands-on approach to ASIP design. Finally, two complete case studies demonstrate the feasibility and the efficiency of the proposed methodology and quantitatively evaluate the benefits of ASIPs in an industrial context.
Описание: The LISA processor design platform (LPDP) presented in Architecture Exploration for Embedded Processors with LISA addresses various design challenges. It addresses SoC integration issues by offering APIs for external simulation environments, as well as solutions for the problem of efficient and user-friendly heterogeneous multiprocessor debugging.
Описание: The design of embedded systems warrants a new perspective because of the following two reasons: Firstly, slow and energy inefficient memory hierarchies have already become the bottleneck of the embedded systems. It is documented in the literature as the memory wall problem. Secondly, the software running on the contemporary embedded devices is becoming increasingly complex. It is also well understood that no silver bullet exists to solve the memory wall problem. Therefore, this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses.The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.Advanced Memory Optimization Techniques for Low Power Embedded Processors is designed for researchers, complier writers and embedded system designers / architects who wish to optimize the energy and performance characteristics of the memory subsystem.
Описание: Embedded processors are the heart of embedded systems. Reconfigurable embedded processors comprise an extended instruction set that is implemented using a reconfigurable fabric (similar to a field-programmable gate array, FPGA). This book presents novel concepts, strategies, and implementations to increase the run-time adaptivity of reconfigurable embedded processors. Concepts and techniques are presented in an accessible, yet rigorous context. A complex, realistic H.264 video encoder application with a high demand for adaptivity is presented and used as an example for motivation throughout the book. A novel, run-time system is demonstrated to exploit the potential for adaptivity and particular approaches/algorithms are presented to implement it.
Описание: The purpose of this book is to survey the state of the art and evolving directions in post-silicon and runtime verification. The authors start by giving an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. They then dive into the presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors, dedicating several chapters to this topic. The presentation of runtime verification solutions follows a similar approach. This is an area of processor design that is still in its early stages of exploration and that holds the promise of accomplishing the ultimate goal of achieving complete correctness guarantees for microprocessor-based computation. The authors conclude the book with a look towards the future of late-stage verification and its growing role in the processor life-cycle.
Описание: This book presents a systematic methodology for exploiting word-width information in embedded compilers. It details a technique for a context-driven strength reduction for constant multiplications, including a trade-off with application accuracy requirements.
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