Автор: Greenwood, Garrison W. Tyrrell, Andrew M. Название: Introduction to evolvable hardware ISBN: 0471719773 ISBN-13(EAN): 9780471719779 Издательство: Wiley Рейтинг: Цена: 7912 р. Наличие на складе: Поставка под заказ.
Описание: Introduction to Evolvable Hardware: A Practical Guide for Designing Self-Adaptive Systems provides a fundamental introduction for engineers, designers, and managers involved in the development of adaptive, high reliability systems. It also introduces the concepts of evolvable hardware (EHW) to new researchers in a structured way. .
Описание: The evolution of digital technology has resulted in the design of digital processors with increasingly complex capabilities. Intended as an introduction to the subject, this book presents an integrated and accessible approach to the design and implemention of digital processors. Dedicated Digital Processors emphasizes the common aspects of hardware and software structures, explaining the opportunities provided for developing low-power, high-speed processors and processor networks. Features include: An introduction to the technological basics of digital computers, including transistor circuits and the properties of current integrated chips. Discussions on complexity issues such as minimization, the timing and synchronization of computations and techniques used to boost performance in modern high-speed processors. The presentation of a programmable processor design, including the handling of input and output, interrupt processing and DMA. A detailed evaluation of standard DSP architectures including up-to-date information on TI 67xx, Analog Devices, Sharc processors and Virtex FPGA (field programmable gate arrays). VHDL examples and exercises that can be simulated and synthesized with free design tools provided by FPGA companies. Based on the author's considerable experience in teaching digital systems design and digital signal processing, this book is an excellent reference for graduate and senior undergraduate students in electronic and computer engineering. Practising engineers and professionals developing DSP applications will appreciate the guidance to designing digital systems.
Автор: Yakovlev Название: Hardware Design and Petri Nets ISBN: 0792377915 ISBN-13(EAN): 9780792377917 Издательство: Springer Рейтинг: Цена: 21485 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Presents a summary in the applications of Petri nets to designing digital systems and circuits. This book is divided into five parts, which cover aspects of behavioral modelling, analysis and verification, synthesis from Petri nets and STGs, design environments based on high-level Petri nets and HDLs, and performance analysis using Petri nets.
Описание: Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community turns to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP) is ideally suited to this task. This handbook focuses on applying OOP to SystemVerilog.
Описание: Presenting the case for C++, this title shows a verification system using object-oriented programming (OOP). It also presents two open-source C++ libraries that enable efficient verification with C++ - Teal, a C++ to Verilog interface, and Truss, a standard verification framework. It focuses on OOP with examples from real verification projects.
Описание: A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test (BIST). This idea was first proposed around 1980 and has grown to become one of the most important testing techniques at the current time, as well as for the future. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented since 1980, along with their advantages and limitations. The BIST approaches include the Built-In Logic Block Observer, pseudo-exhaustive BIST techniques, Circular BIST, scan-based BIST, BIST for regular structures, BIST for FPGAs and CPLDs, mixed-signal BIST, and the integration of BIST with concurrent fault detection techniques for on-line testing. Particular attention is paid to system-level use of BIST in order to maximize the benefits of BIST through reduced testing time and cost as well as high diagnostic resolution. The author spent 15 years as a designer at Bell Labs where he designed over 20 production VLSI devices and 3 production circuit boards. Sixteen of the VLSI devices contained BIST of various types for regular structures and general sequential logic, including the first BIST for Random Access Memories (RAMs), the first completely self-testing integrated circuit, and the first BIST for mixed-signal systems at Bell Labs. He has spent the past 10 years in academia where his research and development continues to focus on BIST, including the first BIST for FPGAs and CPLDs along with continued work in the area of BIST for general sequential logic and mixed-signal systems. He holds 10 US patents (with 5 more pending) for various types of BIST approaches. Therefore, the author brings a unique blend of knowledge and experience to this practical guide for designers, test engineers, product engineers, system diagnosticians, and managers.
Описание: New manufacturing technologies have made possible the integration of entire systems on a single chip. This monograph provides an overview of the validation and test techniques by covering various aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes; and design for testability.
Описание: Presents techniques that are useful in building complex embedded systems. This work is intended to CAD researchers and developers who want to branch off into the field of hardware/software co-design, as well as to digital system designers who are interested in the power and limitations of CAD techniques and their likely evolution.
Автор: Thomas, Donald Moorby, Philip Название: Verilog hardware description language ISBN: 0387849300 ISBN-13(EAN): 9780387849300 Издательство: Springer Рейтинг: Цена: 7314 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Offers reference for Verilog language. This title presents the IEEE 1364-2001 standard of the language. It includes examples that illustrate the features of the language. It is suitable for engineers and students interested in describing, simulating, and synthesizing digital systems.
Описание: Offers an overview of formal verification methods, combined with an analysis of some advanced techniques to improve the scalability of these methods, and close the gap between design and verification in computer-aided design. This title provides the theoretical background required to present such methods and advanced techniques.
Автор: Thomas Donald E., Moorby Philip R. Название: The VerilogВ® Hardware Description Language ISBN: 1402070896 ISBN-13(EAN): 9781402070891 Издательство: Springer Рейтинг: Цена: 10742 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This text presents the IEEE 1364-2001 standard of the Verilog language. The examples in this edition have been updated to illustrate the features of the language. Engineers and students interested in describing, simulating and synthesizing digital systems should find this a useful resource.
Описание: The task of verification is always larger than the task of the design effort. Why? Because the verification system has to encompass the entire functionality of the device under verification. It has to mimic the real world environment that the device will actual operate in. It needs to catch functional errors. It needs to give feedback information to guide further verification. The design effort proceeds from a design specification. Verification systems need to proceed from a verification plan. A comprehensive document that describes the verification system and all its components. A plan that details how the verification system will be built. With the advent of hardware verification languages, today's verifications systems have grown in complexity making verification plans even more paramount. This book is a practical guide on how to get a verification team jumpstarted into verification success by the joint creation of a verification plan. The book includes: -A detailed five day approach that gives day by day, step by step instructions on how to design and document your verification system. -An introduction to hardware verification languages, their pseudo-random mindset, their enabling methodologies (generation, checking and coverage), and how these effect the development of a verification plan. -Practical guidance in common people issues, formatting decisions and information extraction methods to enhance your verification plan brainstorming sessions. -An appendix full of verification plan examples and support documents.
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