Описание: At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs.
Автор: David Chinnery; Kurt Keutzer Название: Closing the Gap Between ASIC & Custom ISBN: 1475776241 ISBN-13(EAN): 9781475776249 Издательство: Springer Рейтинг: Цена: 20896.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Detailing design tools and techniques for high-performance ASIC design, this book covers the use of microarchitecture, timing-driven floor-planning, clock stew, latch-based design, automated cell sizing, and process variation.
Автор: Vahid Frank Название: Digital Design with RTL Design, Verilog and VHDL ISBN: 0470531088 ISBN-13(EAN): 9780470531082 Издательство: Wiley Рейтинг: Цена: 38331.00 р. Наличие на складе: Поставка под заказ.
Описание: Unique with its RTL-early organization, Vahid`s text supports instructors wishing to develop strong design skills in their students. The emergence of parallel processing, multicore processors and FPGAs are blurring the lines between hardware and software and fundamentally altering the way digital design and design logic should be taught.
Автор: Himanshu Bhatnagar Название: Advanced ASIC Chip Synthesis ISBN: 1475776292 ISBN-13(EAN): 9781475776294 Издательство: Springer Рейтинг: Цена: 22203.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Advanced ASIC Chip Synthesis: Using Synopsys (R) Design Compiler (R) Physical Compiler (R) and PrimeTime (R), Second Edition describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools.
Автор: Himanshu Bhatnagar Название: Advanced ASIC Chip Synthesis ISBN: 1461346622 ISBN-13(EAN): 9781461346623 Издательство: Springer Рейтинг: Цена: 14365.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Advanced ASIC Chip Synthesis: Using Synopsys (R) Design Compiler (R) and PrimeTime (R) describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools.
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