Alexander Barkalov; Larysa Titarenko; Jacek Biegan Logic Synthesis for Finite State Machines Based on Linear Chains of States 9783319867144

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Автор: Alexander Barkalov; Larysa Titarenko; Jacek Biegan
Название: Logic Synthesis for Finite State Machines Based on Linear Chains of States
ISBN: 9783319867144
Издательство: Springer
Классификация:

Науки о земле

Электроника

Схемы и компоненты

Искусственный интеллект

ISBN-10: 3319867148
Обложка/Формат: Soft cover
Страницы: 225
Вес: 3.64 кг.
Дата издания: 2018
Серия: Studies in Systems, Decision and Control
Язык: English
Издание: Softcover reprint of
Иллюстрации: 130 tables, color; 145 illustrations, black and white; viii, 225 p. 145 illus.
Размер: 234 x 156 x 13
Читательская аудитория: Professional & vocational
Основная тема: Engineering
Подзаголовок: Foundations, Recent Developments and Challenges
Ссылка на Издательство: Link
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Поставляется из: Германии
Описание: This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units

Дополнительное описание: Introduction.- Finite state machines and ?eld-programmable gate arrays.- Linear chains in FSMs.- Hardware reduction for Moore UFSMs.- Hardware reduction for Mealy UFSMs.- Hardware reduction for Moore NFSMs.- Hardware reduction for Moore XFSMs.

Logic Synthesis for Finite State Machines Based on Linear Chains of States, Alexander Barkalov; Larysa Titarenko; Jacek Biegan