VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability, Thomas Hollstein; Jaan Raik; Sergei Kostin; Anton
Автор: Masahiro Fujita Название: Verification Techniques for System-Level Design, ISBN: 0123706165 ISBN-13(EAN): 9780123706164 Издательство: Elsevier Science Рейтинг: Цена: 10441.00 р. Наличие на складе: Поставка под заказ.
Описание: Explains how to verify SoC logic designs using `formal` and `semi-formal` verification techniques. This book covers various aspects of high-level formal and semi-formal verification techniques for system level designs.
Автор: Veena S. Chakravarthi Название: A Practical Approach to VLSI System on Chip (SoC) Design ISBN: 3030230481 ISBN-13(EAN): 9783030230487 Издательство: Springer Рейтинг: Цена: 11179.00 р. Наличие на складе: Поставка под заказ.
Описание: This book provides a comprehensive overview of the VLSI design process. It covers end-to-end system on chip (SoC) design, including design methodology, the design environment, tools, choice of design components, handoff procedures, and design infrastructure needs. The book also offers critical guidance on the latest UPF-based low power design flow issues for deep submicron SOC designs, which will prepare readers for the challenges of working at the nanotechnology scale. This practical guide will provide engineers who aspire to be VLSI designers with the techniques and tools of the trade, and will also be a valuable professional reference for those already working in VLSI design and verification with a focus on complex SoC designs.
A comprehensive practical guide for VLSI designers;Covers end-to-end VLSI SoC design flow;Includes source code, case studies, and application examples.
Описание: This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors.
Автор: Peter Benner Название: System Reduction for Nanoscale IC Design ISBN: 3319791540 ISBN-13(EAN): 9783319791548 Издательство: Springer Рейтинг: Цена: 6986.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание:
Preface.- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling.- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel.- 3 Reduced Representation of Power Grid Models: Peter Benner and Andrй Schneider.- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang.- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhцfer and Andrй K. Eppler.- Index.
Автор: Prakash Rashinkar; Peter Paterson; Leena Singh Название: System-on-a-Chip Verification ISBN: 1475774680 ISBN-13(EAN): 9781475774689 Издательство: Springer Рейтинг: Цена: 22203.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign-off. All the verification aspects in this exciting new book are illustrated with a single reference design for Bluetooth application.
Автор: Farahmandi Farimah, Huang Yuanwen, Mishra Prabhat Название: System-On-Chip Security: Validation and Verification ISBN: 3030305988 ISBN-13(EAN): 9783030305987 Издательство: Springer Цена: 11179.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches.
Автор: Ashok B. Mehta Название: ASIC/SoC Functional Design Verification ISBN: 3319594176 ISBN-13(EAN): 9783319594170 Издательство: Springer Рейтинг: Цена: 18167.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
Автор: Peter Benner Название: System Reduction for Nanoscale IC Design ISBN: 3319072358 ISBN-13(EAN): 9783319072357 Издательство: Springer Рейтинг: Цена: 12577.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание:
Preface.- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling.- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel.- 3 Reduced Representation of Power Grid Models: Peter Benner and Andrй Schneider.- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang.- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhцfer and Andrй K. Eppler.- Index.
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.
Автор: Ashok B. Mehta Название: ASIC/SoC Functional Design Verification ISBN: 3319866206 ISBN-13(EAN): 9783319866208 Издательство: Springer Рейтинг: Цена: 15372.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
Автор: Bhunia Swarup, Ray Sandip, Sur-Kolay Susmita Название: Fundamentals of IP and Soc Security: Design, Verification, and Debug ISBN: 3319843087 ISBN-13(EAN): 9783319843087 Издательство: Springer Рейтинг: Цена: 12577.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs.
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