Design Automation for Timing-Driven Layout Synthesis, S. Sapatnekar; Sung-Mo (Steve) Kang
Автор: John M. Cohn; David J. Garrod; Rob A. Rutenbar; Ri Название: Analog Device-Level Layout Automation ISBN: 1461361893 ISBN-13(EAN): 9781461361893 Издательство: Springer Рейтинг: Цена: 20962.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University.
Автор: Gangadharan Название: Constraining Designs for Synthesis and Timing Analysis ISBN: 1461432685 ISBN-13(EAN): 9781461432685 Издательство: Springer Рейтинг: Цена: 16769.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This guide to timing constraints in integrated circuit design shows how to maximize performance of IC designs by specifying timing requirements correctly. Coverage includes such design aspects as synthesis, static timing analysis and placement and routing.
Описание: Constitutes the proceedings of the 17th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2007, held in Gothenburg, Sweden, in September 2007. This work contains papers organized in topical sections on high-level design, low power design techniques, low power analog circuits and low power applications.
Автор: Andrew B. Kahng; Jens Lienig; Igor L. Markov; Jin Название: VLSI Physical Design: From Graph Partitioning to Timing Closure ISBN: 9400790201 ISBN-13(EAN): 9789400790209 Издательство: Springer Рейтинг: Цена: 9781.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: LSI Physical Design explores how algorthims can be used to create a geometric chip layout can be created from an abstract circuit design. The text emphasizes essential, fundamental techniques, ranging from hypergraph partictioning and circuit placement to timing closure.
Описание: Constitutes the refereed proceedings of the 15th International Workshop on Power and Timing Optimization and Simulation, PATMOS 2005, held in Leuven, Belgium in September 2005. The 74 full papers presented were organized in topical sections on low-power processors, code optimization for low-power, high-level design, low-power circuits, and more.
Автор: Robert K. Brayton; Alberto L. Sangiovanni-Vincente Название: Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics ISBN: 1461355737 ISBN-13(EAN): 9781461355731 Издательство: Springer Рейтинг: Цена: 13974.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This design style first imposes a fixed layout pattern (or fabric) on the integrated circuit, and then embeds the circuit being implemented into this fabric. The fabric is chosen carefully in order to eliminate the cross-talk problem being faced in modem IC processes.
Описание: Constituting the proceedings of the 12th International Workshop on Power and Timing Modeling, Optimization and Simulation, 2002, the papers have been organized into topical sections including: arithmetics; low-level modelling and characterization; asynchronous and adiabatic techniques.
Автор: Sridhar Gangadharan; Sanjay Churiwala Название: Constraining Designs for Synthesis and Timing Analysis ISBN: 1489989161 ISBN-13(EAN): 9781489989161 Издательство: Springer Рейтинг: Цена: 14365.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This guide to timing constraints in integrated circuit design shows how to maximize performance of IC designs by specifying timing requirements correctly. Coverage includes such design aspects as synthesis, static timing analysis and placement and routing.
Автор: Helmut E. Graeb Название: Analog Layout Synthesis ISBN: 1489973788 ISBN-13(EAN): 9781489973788 Издательство: Springer Рейтинг: Цена: 18284.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Analog layout design is the step of the chip design flow with the least support by commercially available, computer-aided design tools. This book surveys the very latest and most promising approaches to automated analog layout design in chip manufacture.
Автор: Robert K. Brayton; Alberto L. Sangiovanni-Vincente Название: Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics ISBN: 079237407X ISBN-13(EAN): 9780792374077 Издательство: Springer Рейтинг: Цена: 18167.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Cross-talk is one of the major problems since it results in unpredictable design behavior. It can result in delay variation or signal integrity problems in a wire, depending on the state of its neighboring wire. This book introduces a framework for cross-talk-free IC design. It uses a predetermined layout pattern on the IC.
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