Mosfet Modeling For Vlsi Simulation: Theory And Practice, Arora Narain
Автор: BHATTACHARYYA Название: Compact MOSFET Models for VLSI Design ISBN: 0470823429 ISBN-13(EAN): 9780470823422 Издательство: Wiley Рейтинг: Цена: 16624.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Practicing designers, students, and educators in the semiconductor field face an ever expanding portfolio of MOSFET models. In Compact MOSFET Models for VLSI Design , A.B. Bhattacharyya presents a unified perspective on the topic, allowing the practitioner to view and interpret device phenomena concurrently using different modeling strategies.
Автор: Miura-Mattausch Mitiko Et Al Название: Physics And Modeling Of Mosfets, The: Surface-Potential Model Hisim ISBN: 9813203315 ISBN-13(EAN): 9789813203310 Издательство: World Scientific Publishing Цена: 9504.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание:
This volume provides a timely description of the latest compact MOS transistor models for circuit simulation. The first generation BSIM3 and BSIM4 models that have dominated circuit simulation in the last decade are no longer capable of characterizing all the important features of modern sub-100nm MOS transistors. This book discusses the second generation MOS transistor models that are now in urgent demand and being brought into the initial phase of manufacturing applications. It considers how the models are to include the complete drift-diffusion theory using the surface potential variable in the MOS transistor channel in order to give one characterization equation.
Автор: John P. Uyemura Название: Introduction to VLSI Circuits and Systems ISBN: 0471127043 ISBN-13(EAN): 9780471127048 Издательство: Wiley Рейтинг: Цена: 34846.00 р. Наличие на складе: Поставка под заказ.
Описание: Presents modern CMOS logic circuits, fabrication, and layout in a cohesive manner that links the material together with the system-level considerations. Chapter on Verilog HDL allows for rapid start-up. Illustrates the top-down design procedure used in modern VLSI chip design with an emphasis on variations in the HDL, logic, circuits and layout.
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