Writing Testbenches: Functional Verification of HDL Models, Janick Bergeron
Автор: T. R. Padmanabhan Название: Design Through Verilog HDL ISBN: 0471441481 ISBN-13(EAN): 9780471441489 Издательство: Wiley Рейтинг: Цена: 14741.00 р. 21059.00-30% Наличие на складе: Есть (1 шт.) Описание: Verilog provides platforms for designs to be described at different layers of complexity, combine them in a seamless manner, test them at every stage and build up a bug-free design. This book intends to guide readers to master Verilog as an HDL and use it for design.
Автор: Janick Bergeron Название: Writing Testbenches ISBN: 1475783442 ISBN-13(EAN): 9781475783445 Издательство: Springer Рейтинг: Цена: 15672.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Автор: Cavanagh Название: Sequential Logic and Verilog HDL Fundamentals ISBN: 1498738222 ISBN-13(EAN): 9781498738224 Издательство: Taylor&Francis Рейтинг: Цена: 28327.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание:
Sequential Logic and Verilog HDL Fundamentals discusses the analysis and synthesis of synchronous and asynchronous sequential machines. These machines are implemented using Verilog Hardware Description Language (HDL), in accordance with the Institute of Electrical and Electronics Engineers (IEEE) Standard: 1364-1995.
The book concentrates on sequential logic design with a focus on the design of various Verilog HDL projects.Emphasis is placed on structured and rigorous design principles that can be applied to practical applications. Each step of the analysis and synthesis procedures is clearly delineated. Each method that is presented is expounded in sufficient detail with accompanying examples. Many analysis and synthesis examples use mixed-logic symbols incorporating both positive- and negative-input logic gates for NAND (not AND) and NOR (not OR) logic, while other examples utilize only positive-input logic gates. The use of mixed logic parallels the use of these symbols in the industry.
The bookis intended to be a tutorial, and as such, is comprehensive and self-contained. All designs are carried through to completion--nothing is left unfinished or partially designed. Each chapter contains numerous problems of varying complexity to be designed by the reader using Verilog HDL design techniques. The Verilog HDL designs include the design module, the test bench module that tests the design for correct functionality, the outputs obtained from the test bench, and the waveforms obtained from the test bench.
Sequential Logic and Verilog HDL Fundamentals presents Verilog HDL with numerous design examples to help the reader thoroughly understand this popular hardware description language. The book is designed for practicing electrical engineers, computer engineers, and computer scientists; for graduate students in electrical engineering, computer engineering, and computer science; and for senior-level undergraduate students.
Автор: Li Yamin Название: Computer Principles and Design in Verilog HDL ISBN: 1118841093 ISBN-13(EAN): 9781118841099 Издательство: Wiley Рейтинг: Цена: 17416.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание:
Uses Verilog HDL to illustrate computer architecture and microprocessor design, allowing readers to readily simulate and adjust the operation of each design, and thus build industrially relevant skills
Introduces the computer principles, computer design, and how to use Verilog HDL (Hardware Description Language) to implement the design
Provides the skills for designing processor/arithmetic/cpu chips, including the unique application of Verilog HDL material for CPU (central processing unit) implementation
Despite the many books on Verilog and computer architecture and microprocessor design, few, if any, use Verilog as a key tool in helping a student to understand these design techniques
A companion website includes color figures, Verilog HDL codes, extra test benches not found in the book, and PDFs of the figures and simulation waveforms for instructors
Автор: Bergeron Название: Writing Testbenches using SystemVerilog ISBN: 0387292217 ISBN-13(EAN): 9780387292212 Издательство: Springer Рейтинг: Цена: 27950.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Verification is too often approached in an ad hoc fashion. Visually inspecting simulation results is no longer feasible and the directed test-case methodology is reaching its limit. Moore's Law demands a productivity revolution in functional verification methodology.Writing Testbenches Using SystemVerilog offers a clear blueprint of a verification process that aims for first-time success using the SystemVerilog language. From simulators to source management tools, from specification to functional coverage, from I's and O's to high-level abstractions, from interfaces to bus-functional models, from transactions to self-checking testbenches, from directed testcases to constrained random generators, from behavioral models to regression suites, this book covers it all.Writing Testbenches Using SystemVerilog presents many of the functional verification features that were added to the Verilog language as part of SystemVerilog. Interfaces, virtual modports, classes, program blocks, clocking blocks and others SystemVerilog features are introduced within a coherent verification methodology and usage model.Writing Testbenches Using SystemVerilog introduces the reader to all elements of a modern, scalable verification methodology. It is an introduction and prelude to the verification methodology detailed in the Verification Methodology Manual for SystemVerilog.
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