Описание: Constitutes the refereed proceedings of the 15th International Workshop on Power and Timing Optimization and Simulation, PATMOS 2005, held in Leuven, Belgium in September 2005. The 74 full papers presented were organized in topical sections on low-power processors, code optimization for low-power, high-level design, low-power circuits, and more.
Автор: Gangadharan Название: Constraining Designs for Synthesis and Timing Analysis ISBN: 1461432685 ISBN-13(EAN): 9781461432685 Издательство: Springer Рейтинг: Цена: 16769.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This guide to timing constraints in integrated circuit design shows how to maximize performance of IC designs by specifying timing requirements correctly. Coverage includes such design aspects as synthesis, static timing analysis and placement and routing.
Автор: S. Sapatnekar; Sung-Mo (Steve) Kang Название: Design Automation for Timing-Driven Layout Synthesis ISBN: 0792392817 ISBN-13(EAN): 9780792392811 Издательство: Springer Рейтинг: Цена: 26546.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: The automation of layout synthesis design under stringent timing specifications is essential for VLSI circuits and systems design. Through a discussion of the essential design automation process steps and important models and algorithms, this book presents a unified systems approach that can be practiced for high-performance CMOS VLSI designs.
Автор: Naresh Maheshwari; S. Sapatnekar Название: Timing Analysis and Optimization of Sequential Circuits ISBN: 0792383214 ISBN-13(EAN): 9780792383215 Издательство: Springer Рейтинг: Цена: 23757.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with reference to performance parameters such as power and area. This book presents a unified approach to performance analysis and optimization of sequential circuits. It discusses the state of the art in timing analysis and optimization techniques.
Автор: Mukund Sivaraman; Andrzej J. Strojwas Название: A Unified Approach for Timing Verification and Delay Fault Testing ISBN: 0792380797 ISBN-13(EAN): 9780792380795 Издательство: Springer Рейтинг: Цена: 18167.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This text applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation.
Автор: Ivan S. Kourtev; Eby G. Friedman; Baris Taskin Название: Timing Optimization Through Clock Skew Scheduling ISBN: 0792377966 ISBN-13(EAN): 9780792377962 Издательство: Springer Рейтинг: Цена: 22359.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This work focuses on optimizing the timing of large-scale, high-performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits.
Автор: Sridhar Gangadharan; Sanjay Churiwala Название: Constraining Designs for Synthesis and Timing Analysis ISBN: 1489989161 ISBN-13(EAN): 9781489989161 Издательство: Springer Рейтинг: Цена: 14365.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This guide to timing constraints in integrated circuit design shows how to maximize performance of IC designs by specifying timing requirements correctly. Coverage includes such design aspects as synthesis, static timing analysis and placement and routing.
Автор: Andrew B. Kahng; Jens Lienig; Igor L. Markov; Jin Название: VLSI Physical Design: From Graph Partitioning to Timing Closure ISBN: 9400790201 ISBN-13(EAN): 9789400790209 Издательство: Springer Рейтинг: Цена: 9781.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: LSI Physical Design explores how algorthims can be used to create a geometric chip layout can be created from an abstract circuit design. The text emphasizes essential, fundamental techniques, ranging from hypergraph partictioning and circuit placement to timing closure.
Автор: Ivan S. Kourtev; Baris Taskin; Eby G. Friedman Название: Timing Optimization Through Clock Skew Scheduling ISBN: 0387710558 ISBN-13(EAN): 9780387710556 Издательство: Springer Рейтинг: Цена: 19591.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Details timing analysis and optimization techniques for circuits with level-sensitive memory elements. This book contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling.
Описание: Constitutes the proceedings of the 17th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2007, held in Gothenburg, Sweden, in September 2007. This work contains papers organized in topical sections on high-level design, low power design techniques, low power analog circuits and low power applications.
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