Описание: An understanding of high speed interconnect phenomena is necessary for modern designs such as routing and layout of computer motherboards. Computers have reached speeds where digital design must provide for these effects. The problem is that most engineers active today have not been trained in this subject.
Автор: Pasricha, Sudeep Название: On-Chip Communication Architectures,- ISBN: 012373892X ISBN-13(EAN): 9780123738929 Издательство: Elsevier Science Рейтинг: Цена: 11283.00 р. Наличие на складе: Поставка под заказ.
Описание: System-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. This book deals with the concepts, research and trends in on-chip communication architecture design. It provides readers with a comprehensive survey of the standards for on-chip communication architectures.
Автор: Michel Dubois; Shreekant S. Thakkar Название: Cache and Interconnect Architectures in Multiprocessors ISBN: 0792390741 ISBN-13(EAN): 9780792390749 Издательство: Springer Рейтинг: Цена: 20956.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Cache And Interconnect Architectures In Multiprocessors Eilat, Israel May 25-261989 Michel Dubois UniversityofSouthernCalifornia Shreekant S. Thakkar SequentComputerSystems The aim of the workshop was to bring together researchers working on cache coherence protocols for shared-memory multiprocessors with various interconnect architectures. Shared-memory multiprocessors have become viable systems for many applications. Bus- based shared-memory systems (Eg. Sequent's Symmetry, Encore's Multimax) are currently limited to 32 processors. The fIrst goal of the workshop was to learn about the performance ofapplications on current cache-based systems. The second goal was to learn about new network architectures and protocols for future scalable systems. These protocols and interconnects would allow shared-memory architectures to scale beyond current imitations. The workshop had 20 speakers who talked about their current research. The discussions were lively and cordial enough to keep the participants away from the wonderful sand and sun for two days. The participants got to know each other well and were able to share their thoughts in an informal manner. The workshop was organized into several sessions. The summary of each session is described below. This book presents revisions of some of the papers presented at the workshop.
Автор: Ian O`Connor; Gabriela Nicolescu Название: Integrated Optical Interconnect Architectures for Embedded Systems ISBN: 1489992049 ISBN-13(EAN): 9781489992048 Издательство: Springer Рейтинг: Цена: 16977.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book highlights current research in optical interconnect technologies and architectures. Particular emphasis is given to the ways photonic components are assembled into architectures to address the needs of data-intensive on-chip communication.
Автор: Coppola, Marcello Название: Design of Cost-Efficient Interconnect Processing Units ISBN: 1420044710 ISBN-13(EAN): 9781420044713 Издательство: Taylor&Francis Рейтинг: Цена: 18374.00 р. Наличие на складе: Поставка под заказ.
Автор: Ayan Mandal; Sunil P. Khatri; Rabi Mahapatra Название: Source-Synchronous Networks-On-Chip ISBN: 1493948172 ISBN-13(EAN): 9781493948178 Издательство: Springer Рейтинг: Цена: 14365.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. It provides circuit-level details of the NoC and includes architectural simulations of the NoC.
Автор: Nannipieri Название: Next-Generation High-Speed Satellite Interconnect ISBN: 303077046X ISBN-13(EAN): 9783030770464 Издательство: Springer Рейтинг: Цена: 6986.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book introduces the space community to the novel SpaceFibre protocol, developed under the guidance of the European Space Agency (ESA) as the forthcoming, high speed (Gbps) communication protocol for satellite on-board communication.
Автор: Andreas Hansson; Kees Goossens Название: On-Chip Interconnect with aelite ISBN: 1461427118 ISBN-13(EAN): 9781461427117 Издательство: Springer Рейтинг: Цена: 18284.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip. It uses real-world illustrations in the form of case studies and examples that communicate the power of the methods presented.
Описание: This book introduces the space community to the novel SpaceFibre protocol, developed under the guidance of the European Space Agency (ESA) as the forthcoming, high speed (Gbps) communication protocol for satellite on-board communication.
Автор: Sam Fuller Название: RapidIO: The Embedded System Interconnect ISBN: 0470092912 ISBN-13(EAN): 9780470092910 Издательство: Wiley Рейтинг: Цена: 18366.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: Aims to bring together one useful volume on RapidIO interconnect technology, providing a reference work for the evaluation and understanding of RapidIO. Covering useful aspects of the specification, this title also answers most usage questions from both hardware and software engineers.
Описание: Realizing maximum performance from high bit-rate and RF circuits requires close attention to IC technology, circuit-to-circuit interconnections (i.e., the `interconnect`) and circuit design. Many practical circuit examples are included to demonstrate the interplay between technology, interconnect and circuit design.
Автор: Konstantin Moiseev; Avinoam Kolodny; Shmuel Wimer Название: Multi-Net Optimization of VLSI Interconnect ISBN: 149394262X ISBN-13(EAN): 9781493942626 Издательство: Springer Рейтинг: Цена: 13059.00 р. Наличие на складе: Есть у поставщика Поставка под заказ.
Описание: This book examines design and migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects, covering scaling-dependent models for interconnect power, interconnect delay and crosstalk noise, plus design optimization problems.
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